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FUJITSU SEMICONDUCTOR DATA SHEET
DS04-27230-3E
ASSP For Power Manegement Applications (DC/DC Converter for DSC/Camcorder)
4-ch DC/DC Converter IC
for low voltage
MB39A103
DESCRIPTION
The MB39A103 is a 4-channel DC/DC converter IC using pulse width modulation (PWM). This IC is ideal for up conversion, down conversion, and up/down conversion. Achievement of low voltage start-up (1.7 V or more) enables operation from low voltage. 4ch is built in TSSOP-30P/package. Each channel can be controlled, and soft-start. This is an ideal power supply for high-performance portable devices such as digital still cameras. This product is covered by US Patent Number 6,147,477.
FEATURES
* * * * * * * * * * Supports for down-conversion and up/down Zeta conversion (CH1) Supports for up-conversion and up/down Sepic conversion (CH2 to CH4) Low voltage start-up (CH4): 1.7 V Power supply voltage range : 2.5 V to 11 V Reference voltage : 2.0 V 1 % Error amplifier threshold voltage : 1.24 V 1.5 % Built-in totem-pole type output for MOS FET Built-in soft-start circuit independent of loads High-frequency operation capability: 1.5 MHz (Max) External short-circuit detection capability by -INS terminal
PACKAGES
30-pin plastic TSSOP 32-pad plastic BCC
(FPT-30P-M04)
(LCC-32P-M15)
MB39A103
PIN ASSIGNMENTS
(TOP VIEW)
CS2 -INE2 FB2 DTC2 VCC CTL VREF RT CT GND CSCP DTC3 FB3 -INE3 CS3
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
CS1 -INE1 FB1 DTC1 VCCO OUT1 OUT2 OUT3 OUT4 GNDO -INS DTC4 FB4 -INE4 CS4
(FPT-30P-M04) (Continued)
2
MB39A103
(Continued) (TOP VIEW) (Penetration diagram from surface)
-INE2
-INE1
DTC2
CS2
CS1
FB2
N.C.
1
32
31
30
29
28
27
26
FB1
25
DTC1
VCC
2
24
VCCO
CTL
3
23
OUT1
VREF
4
22
OUT2
RT
5
21
OUT3
CT
6
20
OUT4
GND
7
19
GNDO -INS
CSCP
8
18
N.C.
9
10
11
12
13
14
15
16
17
DTC4
-INE3
-INE4
DTC3
FB3
CS3
CS4
(LCC-32P-M15)
FB4
3
MB39A103
PIN DESCRIPTION
Block Pin No. TSSOP
27 28 CH1 29 30 25 4 3 CH2 2 1 24 12 13 CH3 14 15 23 19 18 CH4 17 16 22 9 OSC 8 6 Control 11 20 26 5 Power 7 21 10 5 3 8 18 24 2 4 19 7 RT CTL CSCP -INS VCCO VCC VREF GNDO GND I I O
BCC
25 26 27 28 23 32 31 30 29 22 10 11 12 13 21 17 16 15 14 20 6
Symbol
DTC1 FB1 -INE1 CS1 OUT1 DTC2 FB2 -INE2 CS2 OUT2 DTC3 FB3 -INE3 CS3 OUT3 DTC4 FB4 -INE4 CS4 OUT4 CT
I/O
I O I O I O I O I O I O I O I O
Descriptions Dead time control terminal Error amplifier output terminal Error amplifier inverted input terminal Soft-start setting capacitor connection terminal Totem pole type output terminal Dead time control terminal Error amplifier output terminal Error amplifier inverted input terminal Soft-start setting capacitor connection terminal Totem pole type output terminal Dead time control terminal Error amplifier output terminal Error amplifier inverted input terminal Soft-start setting capacitor connection terminal Totem pole type output terminal Dead time control terminal Error amplifier output terminal Error amplifier inverted input terminal Soft-start setting capacitor connection terminal Totem pole type output terminal Triangular wave frequency setting capacitor connection terminal Triangular wave frequency setting resistor connection terminal Power supply control terminal Short-circuit detection circuit capacitor connection terminal Short-circuit detection comparator inverted input terminal Output block power supply terminal Power supply terminal Reference voltage output terminal Output block ground terminal Ground terminal
4
MB39A103
BLOCK DIAGRAM
Threshold voltage accuracy 1.5% 29 -INE1 Error VREF 10 A Amp1 - + CS1 30 + 1.24 V FB1 28 DTC1 27 Threshold voltage accuracy 1.5% -INE2 2 Error VREF 10 A Amp2 - + CS2 1 + 1.24 V FB2 3 DTC2 4 Threshold voltage accuracy 1.5% -INE3 14 Error VREF 10 A Amp3 - + CS3 15 + 1.24 V FB3 13 DTC3 12 Threshold voltage accuracy 1.5% 17 -INE4 Error VREF 10 A Amp4 - + CS4 16 + 1.24 V FB4 18 DTC4 19
L priority L priority L priority L priority
L priority PWM +Comp.1 + -
CH1 Drive1 Pch
26 VCCO
25 OUT1
IO = 130 mA at VCCO = 4 V L priority PWM +Comp.2 + - CH2 Drive2 Nch
24 OUT2
IO = 130 mA at VCCO = 4 V L priority PWM +Comp.3 + - CH3 Drive3 Nch
23 OUT3
IO = 130 mA at VCCO = 4 V L priority PWM +Comp.4 + - CH4 Drive4 Nch
22 OUT4 21 GNDO
IO = 130 mA at VCCO = 4 V
VREF
Short detection signal (L: at short)
100 k -INS 20 1V CSCP 11 0.9 V 0.4 V
SCP Comp. - +
H: at SCP SCP
Error Amp Power Supply SCP Comp. Power Supply Error Amp Reference
5 VCC
UVLO2 UVLO1 H:UVLO release
bias
Accuracy 1%
1.24 V
Power
OSC
VREF
VR1 ON/OFF
CTL
6 CTL
2.0 V 7 VREF 10 GND
89 RT CT
H : ON (Power/ ON) L : OFF (Standby mode) VTH = 1.4 V
5
MB39A103
ABSOLUTE MAXIMUM RATINGS
Parameter Power supply voltage Output current Peak output current Power dissipation Storage temperature Symbol VCC IO IOP PD TSTG Condition VCC, VCCO terminals OUT1 to OUT4 terminals OUT1 to OUT4 terminals Duty 5% (t = 1/fOSCxDuty) TA +25 C (TSSOP-30P) TA +25 C (BCC-32P) Rating Min -55 Max 12 20 400 1390* 980* +125 Unit V mA mA mW mW C
* : The packages are mounted on the epoxy board (10 cm x 10 cm). WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
RECOMMENDED OPERATING CONDITIONS
Parameter Start power supply voltage Power supply voltage Reference voltage output current Input voltage Control input voltage Output current Oscillation frequency Timing capacitor Timing resistor Soft-start capacitor Short-circuit detection capacitor Reference voltage output capacitor Operating ambient temperature Symbol VCC VCC IREF VINE VDTC VCTL IO fOSC CT RT CS CSCP CREF TA Condition VCC, VCCO terminals (CH4) VCC, VCCO terminal s (CH1 to CH4) VREF terminal -INE1 to -INE4 terminals -INS terminal DTC1 to DTC4 terminals CTL terminal OUT1 to OUT4 terminals * CS1 to CS4 terminals Min 1.7 2.5 -1 0 0 0 0 -15 100 39 11 -30 Value Typ 4 500 100 24 0.1 0.1 0.1 +25 Max 11 11 Unit V V
0 mA V VCC - 0.9 V VREF VREF V 11 V +15 mA 1500 kHz 560 pF 130 k 1.0 F 1.0 F 1.0 +85 F C
* : See " SETTING THE TRIANGULAR OSCILLATION FREQUENCY". Note: Pin numbers referred after this part are present on TSSOP-30P PKG. WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. 6
MB39A103
ELECTRICAL CHARACTERISTICS
Parameter Output voltage Output voltage temperature stability Input stability Load stability Threshold voltage Hysteresis width Threshold voltage Hysteresis width Threshold voltage Input source current Reset voltage Oscillation frequency Frequency temperature stability
Symbol
Pin No 7 7 7 7 22
VREF VREF /VREF Line Load VTH
(VCC = VCCO = 4 V, TA = +25 C) Value Conditions Unit Min Typ Max 1.98 2.00 2.02 V TA = -30 C to +85 C VCC = 2.5 V to 11 V VREF = 0 mA to -1 mA VCC = -10 -10 1.4 0.5* 1.5 +10 +10 1.65 % mV mV V
Under voltage SoftUnder voltage Triangular Short-circuit lockout protection start lockout protection circuit block wave oscillator detection block block circuit block (CH1 to CH3) block [OSC] [SCP] [CS1 to CS4] (CH4) [UVLO1] [UVLO2]
Reference voltage block [Ref]
VH
22
0.02
0.05
0.1
V
VTH
25
VCC =
1.7
1.8
1.95
V
VH VTH ICSCP VRST fOSC fOSC/ fOSC
25 11 11 25 22, 23, 24, 25 VREF =

0.05 0.65 -1.4 1.3 450
0.1 0.70 -1.0 1.45 500
0.2 0.75 -0.6 1.63 550
V V A V kHz
CT = 100 pF, RT = 24 k TA = -30 C to +85 C
22, 23, 24, 25
1*
%
Charge current
ICS
1, 15, 16, 30
CS1 to CS4 = 0 V
-14
-10
-6
A
Threshold voltage Input bias current Voltage gain Frequency bandwidth
Error amplifier block [Error Amp1 to Error Amp4]
VTH IB AV BW
3, 13, 18, 28 2, 14, 17, 29 3, 13, 18, 28 3, 13, 18, 28
FB1 to FB4 = 0.65 V -INE1 to -INE4 = 0 V DC AV = 0 dB
1.222 1.240 1.258 -120 -30 100* 1.6*
V nA dB MHz
* : Standard design value (Continued) 7
MB39A103
(Continued) Parameter Error amplifier block [Error Amp1 to Error Amp4]
Symbol
Pin No 3, 13, 18, 28 3, 13, 18, 28 3, 13, 18, 28 3, 13, 18, 28 22, 23, 24, 25 22, 23, 24, 25 4, 12, 19, 27
(VCC = VCCO = 4 V, TA = +25 C) Value Conditions Unit Min Typ Max FB1 to FB4 = 0.65 V FB1 to FB4 = 0.65 V Duty cycle = 0 % Duty cycle = Dtr DTC1 to DTC4 = 0.4 V Duty 5 % (t = 1/fOSCxDuty) OUT1 to OUT4 = 0 V Duty 5 % (t = 1/fOSCxDuty) OUT1 to OUT4 = 4 V
OUT1 to OUT4 = -15 mA
VOH Output voltage VOL Output source current Output sink current Threshold voltage ISOURCE ISINK VT0 VT100 IDTC
1.7 150 0.3 -2.0
1.9 40 -2 200 0.4 0.9 -0.6 -130
200 -1 1.0 -75
V mV mA A V V A mA
PWM comparator block [PWM Comp.1 to PWM Comp.4]
Input current Output source current Output sink current Output ON resistor Threshold voltage Input bias current CTL input voltage
Output block [Drive1 to Drive4]
ISOURCE
22, 23, 24, 25
ISINK ROH ROL VTH
22, 23, 24, 25 22, 23, 24, 25 22, 23, 24, 25 25
75 0.97
130 18 18 1.00
27 27 1.03
mA V
OUT1 to OUT4 = 15 mA
Short-circuit detection comparator block [SCP Comp.]
IB VIH VIL ICTLH
20 6 6 6 6 5 26 5
-INS = 0 V IC Active mode IC Standby mode CTL = 3 V CTL = 0 V CTL = 0 V CTL = 0 V CTL = 3 V
-25 1.7 0 5
-20 30 0 0 2.3
-17 11 0.8 60 1 2 2 4.5
A V V A A A A mA
Control block [CTL]
Input current ICTLL Standby current Power supply current ICCS ICCSO ICC
*: Standard design value.
8
General
MB39A103
TYPICAL CHARACTERISTICS
Power Supply Current vs. Power Supply Voltage
5
Reference Voltage vs. Power Supply Voltage
5
Power supply current ICC (mA)
4 3 2 1 0 0 2 4 6 8 10 12
Reference voltage VREF (V)
TA = +25 C CTL = 3 V
4 3 2 1 0 0 2 4 6 8
TA = +25 C CTL = 3 V VREF= 0 mA
10
12
Power supply voltage VCC (V)
Power supply voltage VCC (V)
Reference Voltage vs. Operating Ambient Temperature
2.05 2.04 VCC = 4 V CTL = 3 V VREF= 0 mA
Reference voltage VREF (V)
2.03 2.02 2.01 2.00 1.99 1.98 1.97 1.96 1.95 -40 -20 0 20 40
60
80
100
Operating ambient temperature TA (C)
Reference Voltage vs. CTL terminal Voltage
5
CTL terminal Current vs. CTL terminal Voltage
200
4 3 2 1 0 0 2 4 6 8
CTL terminal current ICTL (A)
Reference voltage VREF (V)
TA = +25 C VCC = 4 V VREF= 0 mA CTL = 3 V
TA = +25 C VCC = 4 V
160 120 80 40 0 0 2 4 6 8 10 12
10
12
CTL terminal voltage VCTL (V)
CTL terminal voltage VCTL (V) (Continued) 9
MB39A103
Triangular Wave Oscillation Frequency vs. Timing Resistor
10000
Triangular Wave Oscillation Frequency vs. Timing Capacitor
10000
Triangular wave oscillation frequency fOSC (kHz)
Triangular wave oscillation frequency fOSC (kHz)
TA = +25 C VCC = 4 V CTL = 3 V
TA = +25 C VCC = 4 V CTL = 3 V
1000
1000
100
CT = 560 pF
CT = 39 pF CT = 100 pF CT = 220 pF
100
RT = 130 k
RT = 11 k RT = 24 k RT = 56 k
10 1 10 100 1000
10 10 100 1000 10000
Timing resistor RT (k)
Timing capacitor CT (pF)
Triangular Wave Upper and Lower Limit Voltage vs. Triangular Wave Oscillation Frequency
1.2
Triangular Wave Upper and Lower Limit Voltage vs. Operating Ambient Temperature
1.2
Triangular wave upper and lower limit voltage VCT (V)
1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0
Upper
Triangular wave upper and lower limit voltage VCT (V)
TA = +25 C VCC = 4 V CTL = 3 V RT = 24 k
VCC = 4 V 1.1 CTL = 3 V 1 RT = 24 k CT = 100 pF 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 -40 -20 0 20 40 60
Upper
Lower
Lower
80
100
200
400
600
800 1000 1200 1400 1600
Triangular wave oscillation frequency fOSC (kHz)
Operating ambient temperature TA (C)
Triangular Wave Oscillation Frequency vs. Operating Ambient Temperature
Triangular wave oscillation frequency fOSC (kHz)
560 540 520 500 480 460 440 -40 VCC = 4 V CTL = 3 V RT = 24 k CT = 100 pF
-20
0
20
40
60
80
100
Operating ambient temperature TA (C) (Continued) 10
MB39A103
(Continued)
Error Amplifier Voltage Gain, Phase vs. Frequency Error amplifier voltage gain AV (dB)
40 30 20 10 0 -10 -20 -30 -40 100 1k 10 k 100 k 1M -180 10 M -90 0 AV TA = +25 C VCC = 4 V 180 2.48 V 240 k 90
Phase (deg)
10 k 1 F
+
IN 10 k
2.4 k
-INE1 29 - + + 1.24 V 28 OUT
30 CS1
1.5 V
Error Amp1 the same as other channels
Frequency f (Hz)
Power Dissipation vs. Operating Ambient Temperature (TSSOP-30P)
1600
Power Dissipation vs. Operating Ambient Temperature (BCC-32P)
Power dissipation PD (mW)
1000 980 800 600 400 200 0 -40
Power dissipation PD (mW)
1400 1390 1200 1000 800 600 400 200 0 -40 -20 0 20 40 60 80 100
-20
0
20
40
60
80
100
Operating ambient temperature TA (C)
Operating ambient temperature TA (C)
11
MB39A103
FUNCTIONS
1. DC/DC Converter Functions
(1) Reference voltage block (Ref) The reference voltage circuit generates a temperature-compensated reference voltage (2.0 V Typ) from the voltage supplied from the VCC terminal (pin 5). The voltage is used as the reference voltage for the IC's internal circuitry. The reference voltage can supply a load current of up to 1 mA to an external device through the VREF terminal (pin 7). (2) Triangular-wave oscillator block (OSC) The triangular wave oscillator incorporates a timing capacitor and a timing resistor connected respectively to the CT terminal (pin 9) and RT terminal (pin 8) to generate triangular oscillation waveform amplitude of 0.4 V to 0.9 V. The triangular waveforms are input to the PWM comparator in the IC. (3) Error amplifier block (Error Amp1 to Error Amp4) The error amplifier detects the DC/DC converter output voltage and outputs PWM control signals. In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the output terminal to inverted input terminal of the error amplifier, enabling stable phase compensation to the system. Also, it is possible to prevent rush current at power supply start-up by connecting a soft-start capacitor with the CS1 terminal (pin 30) to CS4 terminal (pin 16) which are the non-inverted input terminal for Error Amp. The use of Error Amp for soft-start detection makes it possible for a system to operate on a fixed soft-start time that is independent of the output load on the DC/DC converter. (4) PWM comparator block (PWM Comp.1 to PWM Comp.4) The PWM comparator is a voltage-to-pulse width modulator that controls the output duty depending on the input/ output voltage. The output transistor turns on while the error amplifier output voltage and DTC voltage remain higher than the triangular wave voltage. (5) Output block (Drive1 to Drive4) The output block is in the totem pole type, capable of driving an external P-channel MOS FET (channel 1), and N-channel MOS FET (channels 2 to 4).
12
MB39A103
2. Channel Control Function
The main or each channel is turned on and off depending on the voltage levels at the CTL terminal (pin 6), CS1 terminal (pin 30), CS2 terminal (pin 1), CS3 terminal (pin 15), and CS4 terminal (pin 16). Channel On/Off Setting Conditions CTL CS1 CS2 CS3 CS4 Power CH1 CH2 CH3 CH4 L H H H H H H * GND High-Z GND GND GND High-Z * GND GND High-Z GND GND High-Z * GND GND GND High-Z GND High-Z * GND GND GND GND High-Z High-Z OFF ON ON ON ON ON ON OFF OFF ON OFF OFF OFF ON OFF OFF OFF ON OFF OFF ON OFF OFF OFF OFF ON OFF ON OFF OFF OFF OFF OFF ON ON
*: Undefined
3. Protective Functions
(1) Timer-latch short-circuit protection circuit (SCP, SCP Comp.) The short-circuit detection comparator detects the Error Amp output voltage level of each channel, and if any channel output voltage of Error Amp reaches the short-circuit detection voltage, the timer circuits are actuated to start charging the external capacitor CSCP connected to the CSCP terminal (pin 11). When the capacitor (CSCP) voltage reaches about 0.7 V, the circuit is turned off the output transistor and sets the dead time to 100 %. In addition, the short-circuit detection from external input is capable by using -INS terminal (pin 20) on shortcircuit detection comparator (SCP Comp.) . To release the actuated protection circuit, either the power supply turn off and on again or set the CTL terminal (pin 6) to the "L" level to lower the VREF terminal (pin 7) voltage to 1.3 V (Min) or less. (See "SETTING TIME CONSTANT FOR TIMER-LATCH SHORT-CIRCUIT PROTECTION CIRCUIT".) (2) Under voltage lockout protection circuit (UVLO) The transient state or a momentary decrease in supply voltage, which occurs when the power supply is turned on, may cause the IC to malfunction, resulting in breakdown or degradation of the system. To prevent such malfunctions, under voltage lockout protection circuit detects a decrease in internal reference voltage with respect to the power supply voltage, turns off the output transistor, and sets the dead time to 100% while holding the CSCP terminal (pin 11) at the "L" level. The circuit restores the output transistor to normal when the supply voltage reaches the threshold voltage of the undervoltage lockout protection circuit.
PROTECTION CIRCUIT OPERATING FUNCTION TABLE
This table refers to output condition when protection circuit is operating. Operating circuit OUT1 OUT2 Short-circuit protection circuit Under voltage lockout protection circuit H H L L OUT3 L L OUT4 L L
13
MB39A103
SETTING THE OUTPUT VOLTAGE
* CH1 to CH4
VO
R1 - R2 -INEx + + 1.24 V CSx Error Amp VO (V) = 1.24 R2 (R1 + R2)
x: Each channel No.
SETTING THE TRIANGULAR OSCILLATION FREQUENCY
The triangular oscillation frequency is determined by the timing capacitor (CT) connected to the CT terminal (pin 9), and the timing resistor (RT) connected to the RT terminal (pin 8). Moreover, it shifts more greatly than the calculated values according to the constant of timing resistor (RT) when the triangular wave oscillation frequency exceeds 1 MHz. Therefore, set it referring to "Triangular Wave Oscillation Frequency vs. Timing Resistor" and "Triangular Wave Oscillation Frequency vs. Timing Capacitor" in " TYPICAL CHARACTERISTICS". Triangular oscillation frequency : fOSC fOSC (kHz) = : 1200000 CT (pF) *RT (k)
14
MB39A103
SETTING THE SOFT-START TIME
To prevent rush currents when the IC is turned on, you can set a soft-start by connecting soft-start capacitors (CS1 to CS4) to the CS1 terminal (pin 30) to the CS4 terminal (pin 16), respectively. Setting each CTLx from "H" to "L" switches to charge the external soft-start capacitors (CS1 to CS4) connected to the CS1 terminal (pin 30) to CS4 terminal (pin 16) at 10 A. The error amplifier output (FB1 to FB4) is determined by comparison between the lower one of the potentials at two non-inverted input terminals (1.24 V, CS terminal voltages) and the inverted input terminal voltage (-INE1 to -INE4). The FB terminal voltage during the soft-start period (CS terminal voltage < 1.24 V) is therefore determined by comparison between the -INE terminal and CS terminal voltages. The DC/DC converter output voltage rises in proportion to the CS terminal voltage as the soft-start capacitor connected to the CS terminal is charged. The soft-start time is obtained from the following formula: Soft-start time: ts (time to output 100%) ts (s) = 0.124 x CSX (F) :
* Soft-Start Circuit
VO VREF
10 A R1 -INEx
R2
L priority
Error Amp - CSx + + 1.24 V CTLx CSx FBx UVLO
CH ON/OFF signal L: ON, H: OFF
x: Each channel No.
15
MB39A103
TREATMENT WITHOUT USING CS TERMINAL
When not using the soft-start function, open the CS1 terminal (pin 30), the CS2 terminal (pin 1), the CS3 terminal (pin 15), the CS4 terminal (pin 16).
* Without Setting Soft-Start Time
"OPEN"
1 CS2 CS1 30
"OPEN"
"OPEN"
15 CS3 CS4 16
"OPEN"
16
MB39A103
SETTING TIME CONSTANT FOR TIMER-LATCH SHORT-CIRCUIT PROTECTION CIRCUIT
Each channel uses the short-circuit detection comparator (SCP) to always compare the error amplifiers output level to the reference voltage. While DC/DC converter load conditions are stable on all channels, the short-circuit detection comparator output remains at "L" level, and the CSCP terminal (pin 11) is held at "L" level. If the load condition on a channel changes rapidly due to a short-circuit of the load, causing the output voltage to drop, the output of the short-circuit detection comparator on that channel goes to "H" level. This causes the external short-circuit protection capacitor CSCP connected to the CSCP terminal (pin 11) to be charged at 1 A. Short-circuit detection time : tSCP tSCP (s) = 0.70 x CSCP (F) : When the capacitor CSCP is charged to the threshold voltage (VTH = 0.70 V), the latch is set and the external : FET is turned off (dead time is set to 100%). At this time, the latch input is closed and the CSCP terminal (pin 11) is held at "L" level. In addition, the short-circuit detection from external input is capable by using -INS terminal (pin 20) on the short-circuit detection comparator (SCP Comp.). The short-circuit detection operation starts when -INS terminal voltage is less than threshold voltage (VTH = 1 V). : When the power supply is turn off and on again or VREF terminal (pin 7) voltage is less than 1.3 V (Min) by setting CTL terminal (pin 6) to "L" level, the latch is released.
* Timer-latch short-circuit protection circuit
VO FBx R1 -INEx R2 - + 1.24 V VREF -INS 20 Error Amp
- + 1V
SCP Comp. SCP + + + + - 1.1 V : FB1 to FB3 1.0 V : FB4
1 A
To each channel Drives
CSCP 11 CSCP CTL VREF S R UVLO
Latch
x: Each channel No. Note : When using self-power supply configuration in which the output from the CH4 DC/DC converter is connected to the VCC, note that short-circuit detection is not possible in the CH4 DC/DC converter output.
17
MB39A103
TREATMENT WITHOUT USING CSCP TERMINAL
When not using the timer-latch short-circuit protection circuit, connect the CSCP terminal (pin 11) to GND (pin 10) with the shortest distance.
* Treatment
without using CSCP terminal
10 11
GND CSCP
18
MB39A103
SETTING THE DEAD TIME
When the device is set for step-up or inverted output based on the step-up or step-up/down Zeta conversion, step-up/down Sepic conversion or flyback conversion, the FB terminal voltage may reach and exceed the triangular wave voltage due to load fluctuation. If this is the case, the output transistor is fixed to a full-ON state (ON duty = 100 %). To prevent this, set the maximum duty of the output transistor. To set it, set the voltage at the DTC terminal by applying a resistive voltage divider to the VREF voltage as shown below. When the DTC terminal voltage is higher than the triangular wave voltage, the output transistor is turned on. The maximum duty calculation formula assuming that triangular wave amplitude = 0.5 V and triangular wave : lower voltage = 0.4 V is given below. : DUTY (ON) Max= : Vdt - 0.4 V Rb x 100 (%) , Vdt (V) = 0.5 V Ra + Rb x VREF
When the DTC terminal is not used, connect it directly to the VREF terminal (pin 7) as shown below (when no dead time is set).
* When
using DTC to set dead time
Ra DTCx Rb 7 VREF Vdt
x: Each channel No.
* When
no dead time is set
DTCx
7
VREF
x: Each channel No. 19
MB39A103
POWERR SUPPLY EXAMPLE USING CH4 FOR SELF-POWER SUPPLY
The MB39A103 can be started with the low input voltage (VIN 1.7 V) if the CH4 is used as a self-power supply. An example of supply the power using the transformer is shown below.
* Power supply example using CH4 for self-power supply
VCCO 2 VIN
OUT4 -INE4 D CS4 16 17 VREF - + + 1.24 V FB4 18 VO4-3 -7.5 V 5 VCC Error Amp4 22 21 GNDO D VO4-1 15 V
VO4-2 5V
Setting shown in the "APPLICATION EXAMPLE" is as follows: * Number of windings for VCC and VCCO is set to the value equivalent to VIN + 2.5 V. CH1 to CH3 are operational on VCC 2.5 V; in order for the CH1 to CH3 to operate on VIN 1.7 V, the number of windings should be set equivalent to VIN + 0.8 V or more for VCC and VCCO.
20
MB39A103
OPERATION EXPLANATION WHEN CTL TURNING ON AND OFF
When CTL is turned on, internal reference voltage VR and VREF generate. When VREF exceeds each threshold voltage (VTH1, VTH2) of UVLO1 and UVLO2 (under voltage lockout protection circuit), UVLO1 and UVLO2 are released, and the operation of output Drive circuit of each channel becomes possible. When CTL is off, VR and VREF fall. When VREF decreases and UVLO1 and UVLO2 fall below each reset voltage (VRST1, VRST2), UVLO operates and output Drive circuit of each channel is forcibly done the operation stop, and makes the output off state. For the period to reach to 2.0 V by VREF voltage after UVLO1 and UVLO2 are released by turning on CTL (refer to a and b in "* Timing Chart") and the period when VREF decreases from 2.0 V after turning off CTL until UVLO1 and UVLO2 operate (refer to a' and b' in "* Timing Chart"), VREF which is the reference voltage does not reach 2.0 V. Therefore, the bias voltage and the bias current in IC do not reach a prescribed value, and the speed of response for IC has decreased. Note : For this reason, when the input sudden change and the load sudden change occur in this period, IC cannot respond immediately and the output might overshoot. Therefore, impress the voltage to CTL terminal by which the VREF terminal voltage never stays in the abovementioned period. * CTL Block Equivalent Circuit
H : at SCP
SCP
To CH1 to CH3 output Drive circuit H : Possible to operate L : Forcibly stop To CS1 to CS3 charge/discharge circuit H : Possible to charge L : Forcibly discharge To CH4 output Drive circuit H : Possible to operate L : Forcibly stop
UVLO2
H : UVLO release
UVLO1 bias
To CS4 charge/discharge circuit H : Possible to charge ErrorAmp Reference L : Forcibly discharge 1.24 V
H : UVLO release
VREF VR Power ON/OFF CTL
5
VCC
6
CTL
7 VREF
21
MB39A103
* Timing Chart
VR = 1.24 V (Typ)
Error Amp Reference voltage VR
VTH1
VTH2
VREF = 2.00 V (Typ)
VRST2 VRST1
Reference voltage VREF
UVLO1 b
UVLO1 release
b'
Valid UVLO1
a UVLO2
UVLO2 release
a'
Valid UVLO2 CH4 output Drive circuit control CH1 to CH3 output Drive circuit control Possible to operate Fixed full-off Possible to operate Fixed full-off Fixed full-off Fixed full-off
CTL terminal voltage
1.5 V 0.2 V (Typ)
22
MB39A103
I/O EQUIVALENT CIRCUIT
Reference voltage block
VCC 5 1.24 V ESD protection element + - 77.3 k 124 k GND 10 ESD protection element 104 k GND GND ESD protection element 7 VREF CTL 6 67 k CSx
Control block
Soft-start block
VREF (2.0 V)
Short-circuit detection block
VREF (2.0 V) 2 k 11 CSCP
Triangular wave oscillator block (RT)
VREF (2.0 V) 0.7 V + - 8 RT
Triangular wave oscillator block (CT)
VREF (2.0 V)
CT 9
GND
GND
GND
Error amplifier block (CH1 to CH4)
VCC VREF (2.0 V) -INEx
Short-circuit detection comparator block
VCC VREF (2.0 V) -INS 20 FBx 100 k
CSx 1.24 V
(1 V)
GND
GND
PWM comparator block (CH1 to CH4)
VCC
Output block (CH1 to CH4)
VCCO 26
FBX DTCX
CT
OUTX
GNDO 21 GND
x: Each channel No. 23
MB39A103
APPLICATION EXAMPLE
R13R14 -INE1 29 A 3.3 k12 k 15 k R15 CS1 30 C20 R16 0.1 F 1 k C21 28 0.1 F FB1 R17 18 k 27 DTC1 R18 13 k R19R20 -INE2 2 B 3 k22 k 15 k R21 CS2 1 C22 R22 0.1 F 1 k C23 0.1 F FB2 3 R23 18 k 4 DTC2 R24 13 k R25R26 -INE3 14 C 2.4 k43 k 15 k R27 CS3 15 C24 R28 0.1 F 2 k C25 VIN 0.047 F FB3 13 (1.7 V to 5 V) R29 33 k 12 DTC3 R30 20 k R31R32 -INE4 17 D 2.4 k43 k 15 k R33 CS4 16 C26 R34 0.1 F 2 k C27 0.047 F FB4 18 R35 19 33 k DTC4 R36 -INS 20 k 20 CSCP 11
VCCO 26 R4 C1 0.1 F 150 25 OUT1 C3 4700 pF
A C5 4.7 F L2 Q1 VC1 15 H VB1 L1 C4 D1 1 F 22 H
VO1 2.5 V, 250 mA
CH1
C6 10 F
L3 C18 B 10 H VC2 R12 OUT2 300 24 C16 4700 pF 4.7 F VB2 C17 1 F Q5 L4 15 H D7
VO2 3.3 V, 500 mA C19 10 F
CH2
C D5 CH3 OUT3 23 C13 1 F T1 C14 D6 2.2 F C15 2.2 F Q4
VO3-1 15 V, 10 mA
VO3-2 5 V, 50 mA
CH4
OUT4 22 GNDO 21 D D2 C8 1 F VCC C32F D8 2.2 D4 C2 0.1 F Q2 C11 2.2 F T2 VO4-1 15 V, 10 mA
Charging current
C9 VO4-2 2.2 F 5 V, 50 mA D3 C10 2.2 F VO4-3 -7.5 V, -5 mA
5
C28 0.01 F 6 8 RT R37 24 k 9 CT
fOSC accuracy 10%
7 VREF C30 0.1 F
CTL 10 GND
C29 100 pF
H : ON (Power ON) L : OFF (Standby mode) VTH = 1.4 V
24
MB39A103
PARTS LIST
COMPONENT
Q1, Q2, Q4 Q5 D1, D7, D8 D2 to D6 L1 L2 L3 L4 T1, T2 C1, C2, C30 C3, C16 C4, C8, C13 C5, C18 C6, C19 C9 to C11 C13, C17 C14, C15 C20 to C24, C26 C25, C27 C28 C29 R4 R12 R13 R14 R15, R21, R27 R16, R22 R17 R18 R19 R20 R23 R24 R25, R31 R26 R28, R34 R29, R35 R30, R36 R32 R33 R37
ITEM
PNP Tr Nch FET NPN Tr Diode Diode Inductor Inductor Inductor Inductor Transformer Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor
SPECIFICATION
VCEO = -12 V, IC = -3 A VDS = 20 V, ID = 1.8 A VCEO = 15 V, IC = 3 A VF = 0.4 V (Max) , at IF = 1 A VF = 0.55 V (Max) , at IF = 0.5 A 22 H 15 H 10 H 15 H 0.1 F 4700 pF 1 F 4.7 F 10 F 2.2 F 1 F 2.2 F 0.1 F 0.047 F 0.01 F 100 pF 150 300 3.3 k 12 k 15 k 1 k 18 k 13 k 3 k 22 k 18 k 13 k 2.4 k 43 k 2 k 33 k 20 k 43 k 15 k 24 k 0.63 A, 160 m 0.76 A, 120 m 0.94 A, 67 m 0.76 A, 120 m 50 V 50 V 25 V 10 V 6.3 V 16 V 25 V 16 V 50 V 50 V 50 V 50 V 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5%
VENDOR
SANYO SANYO SANYO SANYO SANYO TDK TDK TDK TDK SUMIDA TDK TDK TDK TDK TDK TDK TDK TDK TDK TDK TDK TDK ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm
PARTS No.
CPH3106 MCH3405 CPH3206 SBS004 SB05-05CP RLF5018T-220MR63 RLF5018T-150MR76 RLF5018T-100MR94 RLF5018T-150MR76 CLQ52 5388-T095 C1608JB1H104K C1608JB1H472K C3216JB1E105K C3216JB1A475M C3216JB0J106K C3216JB1C225K C3216JB1E105K C3216JB1C225K C1608JB1H104K C1608JB1H473K C1608JB1H103K C1608CH1H101J RR0816P-151-D RR0816P-301-D RR0816P-332-D RR0816P-123-D RR0816P-153-D RR0816P-102-D RR0816P-183-D RR0816P-133-D RR0816P-302-D RR0816P-223-D RR0816P-183-D RR0816P-133-D RR0816P-242-D RR0816P-433-D RR0816P-202-D RR0816P-333-D RR0816P-203-D RR0816P-433-D RR0816P-153-D RR0816P-243-D
Note : SANYO TDK SUMIDA ssm
: SANYO Electric Co., Ltd. : TDK Corporation : SUMIDA Electric Co., Ltd. : SUSUMU Co., Ltd. 25
MB39A103
REFERENCE DATA
TOTAL Efficiency vs. Input Voltage
100 95 TA = +25 C VO1 = 2.5 V, 250 mA VO2 = 3.3 V, 500 mA VO3-1 = 15 V, 10 mA VO3-2 = 5 V, 50 mA VO4-1 = 15 V, 10 mA VO4-2 = 5 V, 50 mA VO4-3 = -7.5 V, -5 mA fOSC = 500 kHz
TOTAL efficiency (%)
90 85 80 75 70 65 60 1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Input voltage VIN (V)
Each CH Efficiency vs. Input Voltage
100 95 TA = +25 C
Each CH efficiency (%)
90 85 80 75 70 65 60 1.0 CH3 CH4 CH1
Note: Only concerned CH and CH4 (self-power supply) are ON. CH2 Include external SW Tr operating current CH4 includes IC current consumption.
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
1.5
Input voltage VIN (V)
(Continued)
26
MB39A103
Conversion Efficiency vs. Load Current (CH1)
100 TA = +25 C VIN = 3.6 V
Conversion efficiency (%)
95 90
CH2, CH3 : OFF 85 80 75 70 65 60 0 50 100 150 200 250 300
IO1 80 mA: discontinuance mode
Load current IO1 (mA)
Conversion Efficiency vs. Load Current (CH2)
100 TA = +25 C VIN = 3.6 V
Conversion efficiency (%)
95 90
CH1, CH3 : OFF 85 80 75 70 65 60 0 100 200 300 400 500
IO1 120 mA: discontinuance mode
Load current lO2 (mA)
(Continued)
27
MB39A103
Conversion Efficiency vs. Load Current (CH3, CH4)
100
Conversion efficiency (%)
95 90 85 80 75 70 65 60 0 10 20 30 CH4 CH3
TA = +25 C VIN = 3.6 V VO3-1 = 10 mA VO4-1 = 10 mA VO4-3 = -5 mA CH1, CH2 : OFF
CH1 to CH3 : OFF
Note: CH3 and CH4 are discontinuance mode.
40 50
Load current IO3-2, IO4-2 (mA)
(Continued)
28
MB39A103
(Continued)
Switching Wave Form (CH1)
VB1(V) 6 4 2 0 VC1(V) 5 0 -5
TA = +25 C VIN = 4 V CTL = 3 V
0
1
2
3
4
5
6
7
8
9
10 t (s)
Switching Wave Form (CH2)
VB2 (V) 1 0 -1 -2 VC2 (V) 10 5 0
TA = +25 C VIN = 4 V CTL = 3 V
0
1
2
3
4
5
6
7
8
9
10 t (s)
29
MB39A103
USAGE PRECAUTION
* Printed circuit board ground lines should be set up with consideration for common impedance. * Take appropriate static electricity measures. * Containers for semiconductor materials should have anti-static protection or be made of conductive material. * After mounting, printed circuit boards should be stored and shipped in conductive bags or containers. * Work platforms, tools, and instruments should be properly grounded. * Working personnel should be grounded with resistance of 250 k to 1 M between body and ground. * Do not apply negative voltages. The use of negative voltages below -0.3 V may create parasitic transistors on LSI lines, which can cause abnormal operation.
ORDERING INFORMATION
Part number MB39A103PFT MB39A103PV3 Package 30-pin plastic TSSOP (FPT-30P-M04) 32-pad plastic BCC (LCC-32P-M15) Remarks
30
MB39A103
PACKAGE DIMENSIONS
30-pin plastic TSSOP (FPT-30P-M04)
7.800.10(.307.004) "A" Details of "A" part 0~8 1.10(.043) MAX 4.40 -0.10 6.400.10 +.008 .173 -.004 (.252.004) 0.25(.010)
+0.20
0.600.10 (.024.004)
INDEX
0.100.05 (.004.002)
0.50(.020)
0.200.03 (.008.001)
0.3865(.0152)
0.1270.03 (.005.001)
0.10(.004) 7.00(.276)
0.900.05 (.035.002) 0.3865(.0152)
C
2001 FUJITSU LIMITED F30007SC-1-1
Dimensions in mm (inches) Note: The values in parentheses are reference values. (Continued)
31
MB39A103
(Continued) 32-pad plastic BCC (LCC-32P-M15)
4.25(.167)TYP 0.50(.020)TYP 5.000.10(.197.004)
25 17
0.80(.031)MAX (Mount height)
17
0.500.10 (.020.004)
25
INDEX AREA
5.000.10 (.197.004)
4.25(.167) TYP 0.50(.020) TYP 0.500.10 (.020.004)
3.00(.118) REF "A"
"C"
"B"
1
9
0.0750.025 (.003.001) (Stand off)
9
3.00(.118)REF
1
Details of "A" part 0.05(.002) 0.14(.006) MIN 0.550.06 (.022.002)
Details of "B" part C0.2(.008) 0.550.06 (.022.002)
Details of "C" part 0.550.06 (.022.002)
0.300.06 (.012.002)
0.550.06 (.022.002)
0.550.06 (.022.002)
C
2005 FUJITSU LIMITED C32067S-c-1-1
Dimensions in mm (inches) Note: The values in parentheses are reference values.
32
MB39A103
FUJITSU LIMITED
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of Fujitsu semiconductor device; Fujitsu does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. Fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of Fujitsu or any third party or does Fujitsu warrant non-infringement of any third-party's intellectual property right or other right by using such information. Fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan.
F0511 (c) 2005 FUJITSU LIMITED Printed in Japan

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